The present invention relates to a static semiconductor memory device in which erroneous writing in cells is prevented.
In a bipolar type static RAM (random access memory), memory cells are arranged at the intersections of word lines and pairs of bit lines. Each memory cell is formed by a flip-flop circuit including a pair of multiemitter transistors, load resistors, and Schottky barrier diodes connected to the load resistors in parallel.
Recent increases in the capacity of static RAM's have led to increases in the resistance value of the load resistors. In a conventional static RAM, however, a problem arises when, for example, a memory cell M.sub.11 is selected by selecting a word line W.sub.1 and a column B.sub.1 soon after a memory cell M.sub.00 is selected by selecting a word line W.sub.0 and a column B.sub.0. In such a case, a memory cell M.sub.01, connected to the word line W.sub.0 and column B.sub.1, is temporarily selected before the intended memory cell M.sub.11 is selected. This is because column selection is generally faster than word line selection. In such a conventional static RAM, there is a possibility of erroneous writing in the selected cell M.sub.11 as is explained below.